This course introduces wireless communication system design on the new Avnet Zynq®-7000 All Programmable SoC / AD9361 Software-Defined Radio Evaluation Kit featuring Analog Devices AD9361 single-chip RF agile transceiver. An IEEE 802.11 receiver example will demonstrate system-level simulation using MATLAB® and Simulink® modeling and code generation tools from MathWorks. Using the Xilinx Vivado® Design Suite, the system will be implemented for production showing the receiver detecting 802.11 beacon frames in a stand-alone system running UBUNTU desktop Linux on Xilinx Zynq AP SoC. Presentations will alternate with instructor-led demos to illustrate coding techniques within MathWorks and Xilinx development tools for high-speed digital signal processing.
Pre-requisites: An understanding of Zynq-7000 All Programmable SoC architecture and embedded Linux principles are helpful but not required.
Duration: ½ -Day (8:30 am – 12:30 pm)